At present, SiO2 films (having a dielectric constant of k>4.0) obtained by vapor phase thin-film formation (chemical vapor deposition (CVD)) are used as interlayer insulating films of semiconductor devices. In addition, there are inorganic polymer materials typified by SiO2-based SOG (spin on glass) materials and organic polymer materials typified by polyarylene ethers, as materials aimed at further lowering of the dielectric constant.
In a situation where ULSI having higher integration and higher operation speed are increasingly demanded, a gauge of wiring materials becomes small, wiring distance is increased and the number of layers in a wiring structure is increased in order to provide finer and highly-integrated chips. These cause increased wiring resistance and parasitic capacitance, which in turn cause signal delay which changes chip performance; therefore, it becomes important to solve these. To suppress signal delay from standpoints of a material and a process technology, it is indispensable to introduce low-resistance wiring materials and materials for an interlayer insulating film having a low dielectric constant. Accordingly, Cu wiring having lower resistance than that of conventional Al wiring and a low-dielectric-constant material as an interlayer insulating film are required.
Conventional interlayer insulating films made of SiO2 films formed by vapor phase thin-film formation (CVD) have high dielectric constants; and therefore when further increasing integration and operation speed of ULSI parasitic capacitance which is a factor that causes signal delay, must be reduced. That is, lowering of the dielectric constant of the interlayer insulating films is required. In addition, since the metal in a wiring material diffuses into the insulating film, a problem arises that a barrier film must be provided in order to suppress the diffusion.